Altera Ramps Up with Support of XAUI Protocol Via 10-Gigabit Ethernet Reference Design

September 24th, 2008

Altera has announced the availability of a 10-gigabit Ethernet (10GbE) reference design targeting designers using the XAUI communications protocol. Line cards and system controllers used within network routers, enterprise and metro Ethernet switches, and storage switches can leverage Altera’s Arria and Stratix series of FPGAs Read the rest of this entry »

Mentor Graphics Announces Precision Synthesis Support for New Xilinx Virtex-5 TXT Field Programmable Gate Arrays

September 24th, 2008

Mentor Graphics Corporation (NASDAQ: MENT) today announced that its suite of advanced synthesis products support Virtex(R)-5 TXT field programmable gate arrays (FPGAs), the newest platform from Xilinx(R) optimized for ultra high-bandwidth applications. The Mentor Graphics Precision(R) RTL and Precision RTL Plus products offer immediate availability of state-of-the-art synthesis support for designs targeting the Virtex-5 TXT FPGA platform. Read the rest of this entry »

Domino Logic in ASIC Design Flow – Detailed Methodology and Breakthroughs in High Speed Design Autom

September 24th, 2008

Geneva, Engineers at STMicroelectronics (NYSE: STM) have revealed how to use domino logic, a very fast circuit design style utilized in the highest performance custom designs,in an automated framework. The approach, documented in the book High Performance ASIC Design: Read the rest of this entry »

IPextreme Intros IEEE 1149.7 cJTAG Semiconductor IP Core

September 23rd, 2008

IPextreme, a system-on-chip designers, unveiled what it claims is the electronics industry’s first synthesizable IP core. This core implements the upcoming IEEE 1149.7 standard, which will be ratified in early 2009. Read the rest of this entry »